I spend most weeks writing about datacenter GPUs that cost more than a car. This week I am writing about one that fits the educational end of the spectrum so tightly it almost feels like a joke, except the silicon is real. Amateur designer Pongsagon Vichit's TinyGPU v2.0 has been tested on real chips from a Tiny Tapeout SKY 25b shuttle, with coverage landing around July 31 and August 5, 2026. The design sits around 240k transistors, with the project page also describing roughly 200k. It is open source Verilog under Apache-2.0 on GitHub. It is not a product launch. It is a working miniature graphics pipeline you can study.
What actually landed on the shuttle
Tiny Tapeout has become one of the main on-ramps for people who want real silicon without a corporate tapeout budget. SKY 25b is the shuttle context for this version. That matters because TinyGPU v2.0 is not an FPGA-only demo that stops at simulation waveforms. The story in early August coverage is that the chip was tested in silicon. For an amateur-designed GPU core, that is the whole plot twist.
The transistor counts in public materials sit near each other rather than in conflict if you treat them as approximate. Coverage and project language land around 240k transistors, while the project page also uses a roughly 200k figure. I am not going to pretend I have an independent gate-level audit. For a design this small, the important fact is the order of magnitude. This is a teaching-scale GPU, not a desktop part.
Feature-wise, v2.0 implements transform and lighting plus rasterization. It targets up to 1000 triangles, 320x240 output, 4-bit color, and an 8-bit z-buffer using QSPI RAM. Clocking is at 25 MHz, with reported frame rates in the 7.5 to 15 FPS range. Those numbers are modest on purpose. They are also concrete, which is rarer than hype in hobby silicon writeups.
The shading model matches the transistor budget. Flat shading, backface culling, affine texture mapping, and one directional light. If you learned fixed-function pipelines from older textbooks or from early console hardware history, the feature list will feel familiar. If you only know modern mesh shaders and ray tracing talk, this will look like a museum exhibit that somehow got a fab slot.
I like projects that admit their constraints in the spec sheet. 4-bit color and an 8-bit z-buffer are not accidents. They are how you keep memory and logic small enough for a Tiny Tapeout tile while still demonstrating a real 3D path from triangles to pixels. Educational hardware should make the tradeoffs visible. TinyGPU does.
Why open-source Verilog still matters here
The GitHub release under Apache-2.0 is the part that turns a cool personal win into a community object. People can read the Verilog, fork it, and argue about pipeline staging without signing an NDA. In a programming and systems audience, that is the difference between admiring a photo of a die and learning how the rasterizer is wired.
Vichit is an amateur designer in the public telling of this project, and I mean that as a compliment to the outcome, not a downgrade. A lot of industry GPU knowledge is locked inside vendors. A readable tiny GPU that survives silicon is a bridge for students who will never get schematic access to a shipping discrete card. Open source does not make it commercially competitive. It makes it teachable.
I also care about the honesty of the positioning. TinyGPU is educational, not commercial. That sentence should be on more GitHub READMEs in this era of everything becoming a startup deck. You can learn a lot from a 25 MHz part that draws a thousand triangles. You should not pretend it replaces a laptop GPU. The project does not seem confused about that, which helps.
From a curriculum angle, the supported features map cleanly onto classic lectures. Transform and lighting. Rasterization. Z-buffering. Texturing with affine mapping. A single directional light. Backface culling. You could build a semester module that pairs each block in the Verilog with a lab on why GPUs historically grew those stages. Simulation alone can teach some of that. Silicon validation teaches the rest, including the ugly parts around boards, bring-up, and memory off chip over QSPI.
There is a cultural hunger for this kind of work right now. Software people are surrounded by AI accelerators they cannot inspect. Hardware people are surrounded by nodes they cannot afford. Tiny Tapeout plus Apache-licensed RTL is one of the few places those groups can meet without a corporate badge. TinyGPU v2.0 is a sharp example because the domain is GPUs, the most mythologized chips in consumer tech.
I will keep recommending projects like this to junior engineers who only ever see CUDA graphs and driver blobs. You do not need to tape out your own GPU to benefit. You need one real design in the world that shows a full path from HDL to pixels on a tiny screen. This is that design for a lot of readers.
v3.0 is already aiming at a programmable pixel shader
The roadmap detail that made me stay with the story is TinyGPU v3.0. Plans point to December 2026 or January 2027, with a programmable pixel shader described as DX8 PS1.1-like, around 290k transistors, and already submitted in the public account of the work. That is a natural next step. Fixed-function pipelines teach history. A small programmable shader stage teaches why modern GPUs became software platforms.
PS1.1-era thinking is a smart target for a transistor budget near 290k. It is constrained enough to fit an educational shuttle story and rich enough that students can write more than a single hardwired shade mode. I am not restating Microsoft documentation beyond that likeness claim in the project reporting. The useful idea is progressive complexity: v2 proves T&L and raster silicon, v3 reaches toward programmability.
Submission timing ahead of a late 2026 or early 2027 window also shows how these shuttle projects really work. You wait. You hope the pack returns. You test. Coverage of v2 clustered near the end of July and first days of August 2026 because that is when silicon results became something writers could verify against project updates. V3 will have its own quiet months.
If v3 lands as planned, the teaching arc gets better. Students can compare a flat-shaded fixed pipeline to a tiny programmable pixel stage on related transistor budgets. That comparison is more valuable than another blog post about a giant AI GPU with no RTL in sight. Progress here is measured in concepts unlocked per square millimeter, not in rasterization leaderboard scores.
My closing view is simple. TinyGPU v2.0 is one of the best recent reminders that "GPU" does not only mean a $2000 board or a rack of accelerators. Sometimes it means about 240k transistors, 320x240 frames, and an open Verilog tree that survived contact with real silicon. For a programming audience, that is not a nostalgic toy story. It is a working lesson plan with a chip attached.
- Open Source
